Embedded System Week 2019

The ReTiS lab was at Embedded Systems Week 2019 (ESWeek2019), and researchers from the lab have delivered the following presentations. Conference: CASES, Session: Interconnect Design “Is Your Bus Arbiter Really Fair? Restoring Fairness in AXI Interconnect for FPGA SoCs” – Francesco Restuccia, Marco Pagani, Alessandro Biondi, Mauro Marinoni, and Giorgio Buttazzo Conference: CODES+ISSS, Session: Adaptive and Intermittent Embedded […]

“IEEE Transactions on Industrial Informatics” Best Paper in 2018

To recognize the best paper published in the 2018 IEEE Transactions on Industrial Informatics journal, the Editorial Board of the journal selected the article “Modeling and Analysis of Engine Control Tasks Under Dynamic Priority Scheduling” authored by Alessandro Biondi and Giorgio Buttazzo of Sant’Anna TeCIP Institute. Researchers Alessandro Biondi, and Giorgio Buttazzo, working at the TeCIP Institute Real-Time Systems Laboratory […]

Research Opportunities in AI for Data Center Operations

Two research opportunities are available at the TECIP Institute of Scuola Superiore Sant’Anna on Artificial Intelligence for supporting Data Center Operations in Cloud Computing and Network Function Virtualization, with application deadline extended to October 14th, 2019. The opportunities are framed in the context of the industrial research project “Artificial Intelligence for Network Function Virtualization” jointly […]

The ReTiS lab at BRIGHT 2019

On 27 September Bright #NotteDeiRicercatori returns to Tuscany. The rich program of the event will involve over 1500 researchers in 350 meetings, events, presentations, and shows in 14 Tuscan cities. The ReTiS lab will present its real-time demos on Friday afternoon at the main building of the Scuola Sant’Anna in Piazza Martiri della Libertà.  More […]

SPHERE project Kick-off meeting

The ReTiS lab is coordinating the consortium composed also by the Università degli Studi di Napoli Federico II, the Università degli Studi di Modena e Reggio Emilia, and the Università degli Studi di Catania. The ReTiS lab held the kick-off meeting of the SPHERE project that aims at providing an integrated operating system framework to […]

Seminar by Marco Caccamo

Designing Mixed-Criticality Applications on Modern Heterogeneous MPSoC Platforms 28th June 2019 – TeCIP Institute – Blue Room – 10.00 a.m. Abstract:Multiprocessor Systems-on-Chip (MPSoC) integrating hard processing cores with programmable logic (PL) are becoming increasingly more available. While these platforms have been originally designed for high-performance computing applications, their rich feature set can be exploited to […]