RT Operating Systems & Virtualization

  • Giorgio Buttazzo, Full professor
  • Alessandro Biondi, Associate professor
  • Tommaso Cucinotta, Associate professor
  • Luca Abeni, Associate professor
  • Daniel Casini, Assistant professor
  • Federico Aromolo, Assistant professor
  • Veronica Rispo, Ph.D. Student
  • Matteo Zini, Ph.D. Student
  • Gerlando Sciangula, Ph.D. Student
  • Raffaele Giannessi, Ph.D. Student
  • Andrea Stevanato, Ph.D. Student
  • Davide Bellassai, Ph.D. Student
  • Giorgiomaria Cicero, Ph.D. Student
  • Niko Salamini, Ph.D. Student
  • Francesco Paladino, Ph.D. Student

The RETIS lab features a longstanding tradition in research in real-time operating systems and virtualization. Some key topics are summarized next, together with a (inevitably non-exhausting) list of related papers published throughout the years.

Resource reservation mechanisms

The RETIS lab has a longstanding tradition in the design and study of mechanisms for resource reservation, aimed at providing temporal isolation between threads (or groups of threads) by means of (typically, periodic) budgeting mechanisms.

Notably, the Constant Bandwidth Server is an output of this lab – published at RTSS 1998. This reservation algorithm is integral part of mainline Linux since 2014, hence present in billions of Linux-based devices. This work received the 2021 RTSS Influential Paper Award.

Many other research works have been published on the topic by the lab, including studies on reservation mechanisms available in other commercial operating systems, such as QNX.

Resource reservation on Linux:
  • T. Cucinotta, L. Abeni. “Migrating Constant Bandwidth Servers on Multi-Cores,” in Proceedings of the 29th International Conference on Real-Time Networks and Systems (RTNS 2021), April 7-9, 2021, Nantes, France (on-line event due to Covid-19).
  • L. Abeni and G. Buttazzo, “Integrating Multimedia Applications in Hard Real-Time Systems”, Proceedings of the IEEE Real-Time Systems Symposium, Madrid, Spain, pp. 4-13, December 2-4, 1998.
  • Abeni, Luca, Giuseppe Lipari, and Juri Lelli. “Constant bandwidth server revisited.” Acm Sigbed Review 11.4 (2015): 19-24.
  • Alessandro Biondi, Alessandra Melani and Marko Bertogna, “Hard Constant Bandwidth Server: Comprehensive Formulation and Critical Scenarios”, Proceedings of the 9th IEEE International Symposium on Industrial Embedded Systems (SIES 2014), Pisa, Italy, June 18-20, 2014.
  • Luca Abeni, Alessandro Biondi, and Enrico Bini, “Hierarchical Scheduling of Real-Time Tasks over Linux-based Virtual Machines”, Journal of Systems and Software, Volume 149, March 2019.
  • Daniel Casini, Luca Abeni, Alessandro Biondi, Tommaso Cucinotta and Giorgio Buttazzo, “Constant Bandwidth Servers with Constrained Deadlines”, In Proceedings of the 25th International Conference on Real-Time Networks and Systems (RTNS 2017), Grenoble, France, October 4-6, 2017.
Resource reservation on QNX:
  • Dakshina Dasari, Matthias Becker, Daniel Casini, and Tobias Blaß, “End-to-End Analysis of Event Chains under the QNX Adaptive Partitioning Scheduler”, In Proceedings of the 28th IEEE Real-Time and Embedded Technology and Applications Symposium (RTAS 2022), Milan, Italy, May 4-6, 2022.
  • Matthias Becker, Dakshina Dasari, and Daniel Casini. “On the QNX IPC: Assessing Predictability for Local and Distributed Real-Time Systems”, In Proceedings of 29th IEEE Real-Time and Embedded Technology and Applications Symposium (RTAS 2023), San Antonio, USA, May 9-12, 2023.


OS-support for predictable task communication mechanisms

Predictable communication mechanisms are a key feature in real-time operating systems. The lab published many works on the topic, mainly considering the Logical Execution Time (LET) paradigm and AUTOSAR-based platforms. Mechanisms based on Direct Memory Access (DMA) engines have also been considered.

  • Davide Bellassai, Alessandro Biondi, Alessandro Biasci, and Bruno Morelli, “Supporting Logical Execution Time in Multi-Core POSIX Systems”, Journal of Systems Architecture, Volume 144, November 2023.
  • Alessandro Biondi and Marco Di Natale, “Achieving Predictable Multicore Execution of Automotive Applications Using the LET Paradigm”, In Proceedings of the 24th IEEE Real-Time and Embedded Technology and Applications Symposium (RTAS 2018), Porto, Portugal, April 11-13, 2018.
  • Paolo Pazzaglia, Daniel Casini, Alessandro Biondi, and Marco Di Natale, “Optimizing Inter-Core Communications under the LET Paradigm using DMA Engines”, IEEE Transactions on Computers, Volume 72, Issue 1, January 2023.
  • Paolo Pazzaglia, Daniel Casini, Alessandro Biondi, and Marco Di Natale, “Optimal Memory Allocation and Scheduling for DMA Data Transfers under the LET Paradigm”, In Proceedings of the 58th ACM/ESDA/IEEE Design Automation Conference (DAC 2021), San Francisco, CA, USA, December 5-9, 2021.

Scheduling latencies and interference

More recently, the RETIS lab published several impactful works on the quantification of scheduling latencies and interference. Among them, it is worth mentioning the osnoise tool, authored by Daniel Bristot de Oliveira, which has been an integral part of the Linux kernel since 2021.

  • Daniel Bristot de Oliveira, Daniel Casini, and Tommaso Cucinotta. “Operating System Noise in the Linux Kernel”, IEEE Transactions on Computers, vol. 72, no. 11, pp. 196 – 207, Jan. 2023.
  • Daniel Bristot de Oliveira, Daniel Casini, Rômulo Silva de Oliveira, and Tommaso Cucinotta. “Demystifying the Real-Time Linux Scheduling Latency”, In Proceedings of the 32th Euromicro Conference on Real-time Systems (ECRTS 2020), Modena, Italy, July 7-10, 2020.

Middleware frameworks

Modern systems commonly leverage middleware frameworks to run complex workloads, such as those related to artificial intelligence and robotics. The RETIS lab has been a pioneer in the study of the implications of real-time performance of using these frameworks, with works targeting ROS 2, TensorFlow, and the DDS.

Among them, it is worth mentioning the work published in ECRTS 2019 about ROS 2. This has been the first work in the real-time community of the topic, with considerable impact and sparkling many follow ups by the international community. This work was the first one to unveil the real-time behavior of the ROS 2 internal scheduler, as also acknowledged by the ROS 2 documentation.

ROS 2:
  • Daniel Casini, Tobias Blaß, Ingo Lütkebohle, and Björn B. Brandenburg, “Response-Time Analysis of ROS 2 Processing Chains under Reservation-Based Scheduling”, In Proceedings of the 31th Euromicro Conference on Real-Time Systems (ECRTS 2019), Stuttgart, Germany, July 9-12, 2019.
  • Tobias Blaß, Daniel Casini, Sergey Bozhko, and Björn B. Brandenburg, “A ROS 2 Response-Time Analysis Exploiting Starvation Freedom and Execution-Time Variance”, In Proceedings of the 42nd IEEE Real-Time Systems Symposium (RTSS 2021), Dortmund, Germany, December 7-10, 2021.
DDS:
  • Gerlando Sciangula, Daniel Casini, Alessandro Biondi, and Claudio Scordino. “End-to-End Latency Optimization of Thread Chains Under the DDS Publish/Subscribe Middleware”, In Proceedings of the Design, Automation, and Test in Europe Conference (DATE 2024), March 25-27, 2024, Valencia, Spain.
  • Gerlando Sciangula, Daniel Casini, Alessandro Biondi, Claudio Scordino, and Marco Di Natale. “Bounding the Data-Delivery Latency of DDS Messages in Real-Time Applications”, In Proceedings of the 35th Euromicro Conference on Real-time Systems (ECRTS 2023), Vienna, Austria, July 11-14, 2023.
  • Andrea Stevanato, Alessandro Biondi, Alessandro Biasci, and Bruno Morelli, “Virtualized DDS Communication for Multi-Domain Systems: Architecture and Performance Evaluation of Design Alternatives”, in Proceedings of the 29th IEEE Real-Time and Embedded Technology and Applications Symposium (RTAS), San Antonio, USA, May 9-12, 2023.
TensorFlow:
  • Daniel Casini, “A Theoretical Approach to Determine the Optimal Size of a Thread Pool for Real-Time Systems”, In Proceedings of the 43rd IEEE Real-Time Systems Symposium (RTSS 2022), Houston, USA, December 5-8, 2022.
  • Daniel Casini, Alessandro Biondi, and Giorgio Buttazzo, “Analyzing Parallel Real-Time Tasks Implemented with Thread Pools”, In Proceedings of the 56th ACM/ESDA/IEEE Design Automation Conference (DAC 2019), Las Vegas, NV, USA , June 2-6, 2019.
  • Daniel Casini, Alessandro Biondi, and Giorgio Buttazzo, “Timing Isolation and Improved Scheduling of Deep Neural Networks for Real-Time Systems”, Software: Practice and Experience, Volume 50, Issue 9, September 2020.
Apollo:
  • Luca Belluardo, Andrea Stevanato, Daniel Casini, Giorgiomaria Cicero, Alessandro Biondi, and Giorgio Buttazzo, “A multi-domain software architecture for safe and secure autonomous driving”, Proc. of the 27th IEEE International Conference on Embedded and Real-Time Computing Systems and Applications (RTCSA 2021) , August 18-20, 2021.

Virtualization of embedded systems

The RETIS lab also has a vast experience in the virtualization of embedded systems. Works span from bare-metal hypervisors to type-2 hypervisors in Linux.

  • Daniel Casini, Alessandro Biondi, Giorgiomaria Cicero, and Giorgio Buttazzo. “Latency Analysis of I/O Virtualization Techniques in Hypervisor-Based Real-Time Systems”, In Proceedings of the 27th IEEE Real-Time and Embedded Technology and Applications Symposium (RTAS 2021), May 18-21, 2021.
  • Matteo Zini, Giorgiomaria Cicero, Daniel Casini, and Alessandro Biondi, “Profiling and Controlling I/O-related Memory Contention in COTS Heterogeneous Platforms”, Software: Practice and Experience, Volume 52, Issue 5, May 2022.
  • Alessandro Biondi, Daniel Casini , Giorgiomaria Cicero, Niccolò Borgioli, Giorgio Buttazzo, et al., “SPHERE: A Multi-SoC Architecture for Next-generation Cyber-Physical Systems Based on Heterogeneous Platforms”, IEEE Access , Vol. 9, pp. 75446-75459, May 2021.
  • L. Abeni, A. Balsini, T. Cucinotta. “Container-Based Real-Time Scheduling in the Linux Kernel,” in Proceedings of the International Workshop on Embedded Operating Systems (EWILI 2018), October 10th, 2018, Torino, Italy.

Memory virtualization and contention control

When virtualizing an embedded system, the memory subsystem plays an important role, as it is often a bottleneck for real-time performance. The lab published several works on the topic.

  • Matteo Zini, Daniel Casini, and Alessandro Biondi, “Analyzing ARM’s MPAM From the Perspective of Time Predictability”, IEEE Transactions on Computers, vol. 72, no. 1, pp. 168 – 182, Jan. 2023.
  • Francesco Restuccia, Alessandro Biondi, Mauro Marinoni, Giorgiomaria Cicero, and Giorgio Buttazzo, “AXI HyperConnect: A Predictable, Hypervisor-level AXI Interconnect for Hardware Accelerators in FPGA SoC”, In Proceedings of the 57th ACM/ESDA/IEEE Design Automation Conference (DAC 2020), San Francisco, CA, USA, July 19-23, 2020.
  • Marco Pagani, Enrico Rossi, Alessandro Biondi, Mauro Marinoni, Giuseppe Lipari, and Giorgio Buttazzo, “A Bandwidth Reservation Mechanism for AXI-based Hardware Accelerators on FPGAs”, In Proceedings of the 31st Euromicro Conference on Real-Time Systems (ECRTS 19), Stuttgart, Germany, July 9-12, 2019.
  • Paolo Modica, Alessandro Biondi, Giorgio Buttazzo and Anup Patel, “Supporting Temporal and Spatial Isolation in a Hypervisor for ARM Multicore Platforms”, In Proceedings of the 18th IEEE International Conference on Industrial Technology (ICIT 2018), Lyon, France, February 20-22, 2018.
  • Raffaele Giannessi, Alessandro Biondi, and Alessandro Biasci, “RT-Mimalloc: A New Look at Dynamic Memory Allocation for Real-Time Systems”, In Proceedings of the 30th IEEE Real-Time and Embedded Technology and Applications Symposium (RTAS 2024), May 13-16, 2024, Hong Kong, China.