Giorgiomaria Cicero
Research Associate
Research Associate since October 2017.
Publications
Search:
Year:
- YEAR: 2022
-
Serra, G.; Fara, P.; Cicero, G.; Restuccia, F.; Biondi, A.
PAC-PL: Enabling Control-Flow Integrity with Pointer Authentication in FPGA SoC Platforms
241 - 253 2022 IEEE 28th Real-Time and Embedded Technology and Applications Symposium (RTAS) - IEEE (2022)
Volume nr. :127
-
Zini, Matteo; Cicero, Giorgiomaria; Casini, Daniel; Biondi, Alessandro
Profiling and controlling I/O‐related memory contention in COTS heterogeneous platforms
1095 - 1113 SOFTWARE-PRACTICE & EXPERIENCE (2022)
Volume nr. :52
Issue nr. :5
-
Borgioli, Niccolo; Zini, Matteo; Casini, Daniel; Cicero, Giorgiomaria; Biondi, Alessandro; Buttazzo, Giorgio
An I/O Virtualization Framework with I/O-Related Memory Contention Control for Real-Time Systems
4469 - 4480 IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS (2022)
Volume nr. :41
Issue nr. :11
- YEAR: 2021
-
Biondi, A.; Casini, D.; Cicero, G.; Borgioli, N.; Buttazzo, G.; Patti, G.; Leonardi, L.; Bello, L. L.; Solieri, M.; Burgio, P.; Olmedo, I. S.; Ruocco, A.; Palazzi, L.; Bertogna, M.; Cilardo, A.; Mazzocca, N.; Mazzeo, A.
SPHERE: A Multi-SoC Architecture for Next-Generation Cyber-Physical Systems Based on Heterogeneous Platforms
32767 - 32767 IEEE ACCESS (2021)
Volume nr. :9
-
Casini, Daniel; Biondi, Alessandro; Cicero, Giorgiomaria; Buttazzo, Giorgio
Latency Analysis of I/O Virtualization Techniques in Hypervisor-Based Real-Time Systems
306 - 319 Proceedings of the 2021 IEEE 27th Real-Time and Embedded Technology and Applications Symposium (RTAS) - IEEE (2021)
Volume nr. :1
Issue nr. :1
-
Belluardo, L.; Stevanato, A.; Casini, D.; Cicero, G.; Biondi, A.; Buttazzo, G.
A Multi-Domain Software Architecture for Safe and Secure Autonomous Driving
73 - 82 Proceedings - 2021 IEEE 27th International Conference on Embedded and Real-Time Computing Systems and Applications, RTCSA 2021 - Institute of Electrical and Electronics Engineers Inc. (2021)
- YEAR: 2020
-
Restuccia, F.; Biondi, A.; Marinoni, M.; Cicero, G.; Buttazzo, G.
AXI HyperConnect: A predictable, hypervisor-level interconnect for hardware accelerators in FPGA SoC
1 - 6 Proceedings - Design Automation Conference - Institute of Electrical and Electronics Engineers Inc. (2020)
Volume nr. :127
- YEAR: 2019
-
Biondi, Alessandro; Nesti, Federico; Cicero, Giorgiomaria; Casini, Daniel; Buttazzo, Giorgio Carlo
A Safe, Secure, and Predictable Software Architecture for Deep Learning in Safety-Critical Systems
IEEE EMBEDDED SYSTEMS LETTERS (2019)
- YEAR: 2018
-
Cicero, Giorgiomaria; Biondi, Alessandro; Buttazzo, Giorgio Carlo
Reconciling security with virtualization: A dual-hypervisor design for ARM TrustZone
1628 - 1633 Proceedings of the IEEE International Conference on Industrial Technology - Institute of Electrical and Electronics Engineers Inc. (2018)
Volume nr. :127
- YEAR: 2022
-
Serra, G.; Fara, P.; Cicero, G.; Restuccia, F.; Biondi, A.
PAC-PL: Enabling Control-Flow Integrity with Pointer Authentication in FPGA SoC Platforms
241 - 253 2022 IEEE 28th Real-Time and Embedded Technology and Applications Symposium (RTAS) - IEEE (2022)
Volume nr. :127
- YEAR: 2021
-
Casini, Daniel; Biondi, Alessandro; Cicero, Giorgiomaria; Buttazzo, Giorgio
Latency Analysis of I/O Virtualization Techniques in Hypervisor-Based Real-Time Systems
306 - 319 Proceedings of the 2021 IEEE 27th Real-Time and Embedded Technology and Applications Symposium (RTAS) - IEEE (2021)
Volume nr. :1
Issue nr. :1
-
Belluardo, L.; Stevanato, A.; Casini, D.; Cicero, G.; Biondi, A.; Buttazzo, G.
A Multi-Domain Software Architecture for Safe and Secure Autonomous Driving
73 - 82 Proceedings - 2021 IEEE 27th International Conference on Embedded and Real-Time Computing Systems and Applications, RTCSA 2021 - Institute of Electrical and Electronics Engineers Inc. (2021)
- YEAR: 2020
-
Restuccia, F.; Biondi, A.; Marinoni, M.; Cicero, G.; Buttazzo, G.
AXI HyperConnect: A predictable, hypervisor-level interconnect for hardware accelerators in FPGA SoC
1 - 6 Proceedings - Design Automation Conference - Institute of Electrical and Electronics Engineers Inc. (2020)
Volume nr. :127
- YEAR: 2018
-
Cicero, Giorgiomaria; Biondi, Alessandro; Buttazzo, Giorgio Carlo
Reconciling security with virtualization: A dual-hypervisor design for ARM TrustZone
1628 - 1633 Proceedings of the IEEE International Conference on Industrial Technology - Institute of Electrical and Electronics Engineers Inc. (2018)
Volume nr. :127
- YEAR: 2022
-
Zini, Matteo; Cicero, Giorgiomaria; Casini, Daniel; Biondi, Alessandro
Profiling and controlling I/O‐related memory contention in COTS heterogeneous platforms
1095 - 1113 SOFTWARE-PRACTICE & EXPERIENCE (2022)
Volume nr. :52
Issue nr. :5
-
Borgioli, Niccolo; Zini, Matteo; Casini, Daniel; Cicero, Giorgiomaria; Biondi, Alessandro; Buttazzo, Giorgio
An I/O Virtualization Framework with I/O-Related Memory Contention Control for Real-Time Systems
4469 - 4480 IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS (2022)
Volume nr. :41
Issue nr. :11
- YEAR: 2021
-
Biondi, A.; Casini, D.; Cicero, G.; Borgioli, N.; Buttazzo, G.; Patti, G.; Leonardi, L.; Bello, L. L.; Solieri, M.; Burgio, P.; Olmedo, I. S.; Ruocco, A.; Palazzi, L.; Bertogna, M.; Cilardo, A.; Mazzocca, N.; Mazzeo, A.
SPHERE: A Multi-SoC Architecture for Next-Generation Cyber-Physical Systems Based on Heterogeneous Platforms
32767 - 32767 IEEE ACCESS (2021)
Volume nr. :9
- YEAR: 2019
-
Biondi, Alessandro; Nesti, Federico; Cicero, Giorgiomaria; Casini, Daniel; Buttazzo, Giorgio Carlo
A Safe, Secure, and Predictable Software Architecture for Deep Learning in Safety-Critical Systems
IEEE EMBEDDED SYSTEMS LETTERS (2019)