The ReTiS lab was at Embedded Systems Week 2019 (ESWeek2019), and researchers from the lab have delivered the following presentations.

Conference: CASES, Session: Interconnect Design

“Is Your Bus Arbiter Really Fair? Restoring Fairness in AXI Interconnect for FPGA SoCs” – Francesco Restuccia, Marco Pagani, Alessandro Biondi, Mauro Marinoni, and Giorgio Buttazzo

Conference: CODES+ISSS, Session: Adaptive and Intermittent Embedded Systems

“FLORA: Floorplan Optimizer for Reconfigurable Areas in FPGAs” – Biruk Seyoum, Alessandro Biondi, and Giorgio Buttazzo

Special Session: ?

Organized by Giorgio Buttazzo (Scuola Superiore Sant’Anna of Pisa), Jörg Henkel (Karlsruhe Institute of Technology), and Dirk Ziegenbein (Robert Bosch GmbH).

#AlessandroBiondi delivered the presentation “Development and Analysis of Real-Time Applications on Heterogeneous FPGA-based SoC“.

EWiLi2019 – the Embedded Operating Systems Workshop, co-located with the Embedded Systems Week 2019, Session: Energy-Aware Systems

“An adaptive, utilization-based approach to schedule real-time tasks for ARM big.LITTLE architectures” – Agostino Mascitti, Tommaso Cucinotta, and Mauro Marinoni